Right, so there’s a non-negligible number of TI users that use hardware with their DSRs (device-specific firmware) in battery-backed RAM.
This is a horrible, HORRIBLE idea … but I’m apparently having difficulty communicating to various users exactly why it’s a bad idea. “It’s worked for me for thirty years, all I need to do when the system gets weird is to pop the battery and reload the DSR”.
Well, that’s nice, sunshine, but just because it kinda sorta works for you most of the time
doesn’t mean that it’s a good idea to design hardware that way.
I understand the arguments for using RAM for firmware — rapid development cycle and easy upgrades. And that’s it. Let me enumerate the arguments against using RAM for firmware:
- You’ve got to be able to bootstrap the system somehow. If the DSRs are involved in the boot process (whether simply initializing buffers, or actually being a boot device), and they’re corrupted, you’re screwed if you don’t have an alternate method to boot the device and restore the DSR.
- It is way, WAY too easy to corrupt the DSR. The HDX DSR, in particular, appears to use buffers at the upper end of what would be ROM space. It’s RAM, though, so it doesn’t have to worry about the buffers being overwritten by other programs. It does have to worry about overrunning those buffers and thus corrupting code, though, and it doesn’t. The HDX has many flaws, but this is the killer — it doesn’t separate data from executable code, because (in the words of Raoul Duke) “the pension fund was just sitting there!”
- Modified Harvard Architecture. Learn it, live it, love it. Keep your executable code separate from your data buffers and your system won’t be vulnerable to buffer overflows. We learned this in UNIX a long, long time ago, and that’s why NX pages exist.
- Ready availability of cheap EPROM programmers. Back in the eighties, an EPROM burner was a valuable device. My Data-I/O burner cost nearly four digits. They’re USD$30.00 now on eBay and any fool can use the Windows point-and-drool interface to burn the DSR to EPROM.
In summary, using RAM for DSRs on the TI is (in my educated, non-humble opinion) a gigantic goddamned design error.
There. That’s off my chest 🙂